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Framework Agreement FPGA Programming

Deutsches Zentrum für Luft-und Raumfahrt e. V. | TI-ZVM·Braunschweig, Germany·EUR 800k·Expired · Aug 10, 2026·Open·Services
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Oryginalny tytuł ogłoszenia

Germany – Software programming and consultancy services – Rahmenvertrag FPGA Programmierung

50/100

Ocena szansy

Needs reviewHigh complexity
ServicesExpired
Skąd ta ocena?

Szansa

50 / 100

Złożoność

85 / 100

Czynniki ryzyka

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Award criteria are not provided in any document. Bidders cannot assess how the tender will be evaluated, making bid pre...

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Przegląd

Moderate opportunity

Kluczowe fakty

  • EUR 800k estimated value
  • Services contract
  • 1 lot
  • Duration 4 YEAR
  • Development and implementation of system architectures for multi-channel broadband radar systems on FPGA/RFSoC basis
  • Design of hardware and software concepts including interfaces, data transmission, synchronization, and control
Pokaż pełne podsumowanie

Framework agreement for FPGA programming services for multi-channel broadband radar systems at DLR's Institute of High-Frequency Technology and Radar Systems. The work includes programming RFSoC FPGA modules with high-speed ADC/DAC, integrating Alveo U50 accelerator cards, and developing control software. Duration 4 years with option to extend twice by 12 months. Open procedure, estimated value €800,000. Submission deadline 10 August 2026 09:00 UTC.

Ryzyka

Tender structured data flags 'isEuFunded: true' but XML notice states 'FundingProgramCode: no-eu-funds'. This discrepan...

Award criteria are not provided in any document. Bidders cannot assess how the tender will be evaluated, making bid pre...

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Przeanalizowano tylko część dokumentacji. Pozostałe dokumenty mogą zawierać dodatkowe wymagania, certyfikaty lub dokumenty do złożenia.

Kluczowe wymagania

Technical

  • Minimum 5 years professional experience with Xilinx Kintex UltraScale, UltraScale+ FPGAs
  • Detailed knowledge of vadatech AMC599 and VPX599 cards and PCIe connectivity via Xilinx IP Core
  • Experience programming and connecting AMD Alveo U50 accelerator cards

Wymagania mogą być niepełne.

Zamawiający

Lokalizacja

Braunschweig, DEU

Profil zamawiającego

Otwórz profil

Identyfikator

Leitweg-ID 992-03005-81

Działalność

General public services

Części (1)

LOT-0001

Framework Agreement FPGA Programming

Single lot covering all FPGA programming and associated software development for radar systems. Includes system architecture design, hardware/software interfaces, data transmission, synchronization, and control. Performance at DLR Oberpfaffenhofen in Weßling, Germany.

ServicesFrameworkEU fundedElectronic submissionSME suitable

EUR 800k

Szacowana wartość

Lokalizacja

Weßling, Germany

Czas trwania

4 YEAR

Kategoria

Software programming

Termin

Expired Aug 10, 2026

Szczegóły zamówienia

Data publikacji
09 Jul 2026
Języki
German

Metadane referencyjne

Podstawa prawna
32014L0024

Identyfikatory referencyjne

ID przetargu
477774-2026

Dokumenty (1)

Dokument zamówienia 1

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