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Framework Agreement FPGA Programming

Deutsches Zentrum für Luft- und Raumfahrt e.V. (DLR)·Köln, Germany·EUR 800k·Deadline Aug 10, 2026 · 11 days left·Open·Services
Structured notice only
Original notice title

Germany – Software programming and consultancy services – Rahmenvertrag FPGA Programmierung

50/100

Opportunity Score

Needs reviewHigh complexity
ServicesOpen
Why this score?

Opportunity

50 / 100

Complexity

85 / 100

Risk factors

Tender structured data flags 'isEuFunded: true' but XML notice states 'FundingProgramCode: no-eu-funds'. This discrepan...

Award criteria are not provided in any document. Bidders cannot assess how the tender will be evaluated, making bid pre...

Submission deadline in 11 days

Deep Portfolio Analysis

Deep Company Fit Analysis

Uses:

  • Description
  • Industries & Services
  • Capabilities
  • Market & Experience
  • Certifications

Overview

Moderate opportunity

Key Facts

  • EUR 800k estimated value
  • Services contract
  • 1 lot
  • Duration 4 YEAR
  • Development and implementation of system architectures for multi-channel broadband radar systems on FPGA/RFSoC basis
  • Design of hardware and software concepts including interfaces, data transmission, synchronization, and control
Show full summary

Framework agreement for FPGA programming services for multi-channel broadband radar systems at DLR's Institute of High-Frequency Technology and Radar Systems. The work includes programming RFSoC FPGA modules with high-speed ADC/DAC, integrating Alveo U50 accelerator cards, and developing control software. Duration 4 years with option to extend twice by 12 months. Open procedure, estimated value €800,000. Submission deadline 10 August 2026 09:00 UTC.

Risks

Tender structured data flags 'isEuFunded: true' but XML notice states 'FundingProgramCode: no-eu-funds'. This discrepan...

Award criteria are not provided in any document. Bidders cannot assess how the tender will be evaluated, making bid pre...

Submission deadline in 11 days

Analysis may be incomplete

Only part of the procurement documentation was analyzed. Additional eligibility requirements, certificates, or submission documents may exist in the remaining tender documentation.

Key Requirements

Technical

  • Minimum 5 years professional experience with Xilinx Kintex UltraScale, UltraScale+ FPGAs
  • Detailed knowledge of vadatech AMC599 and VPX599 cards and PCIe connectivity via Xilinx IP Core
  • Experience programming and connecting AMD Alveo U50 accelerator cards

Requirements may be incomplete.

Buyer

Location

Köln, DEU

Buyer profile

Open profile

Identifier

Leitweg-ID 992-03005-81

Activity

General public services

Lots (1)

LOT-0001

Framework Agreement FPGA Programming

Single lot covering all FPGA programming and associated software development for radar systems. Includes system architecture design, hardware/software interfaces, data transmission, synchronization, and control. Performance at DLR Oberpfaffenhofen in Weßling, Germany.

ServicesFrameworkEU fundedElectronic submissionSME suitable

EUR 800k

Estimated value

Location

Weßling, Germany

Duration

4 YEAR

Category

Software programming

Deadline

Deadline Aug 10, 2026

Procurement Details

Publication date
09 Jul 2026
Languages
German

Reference metadata

Legal basis
32014L0024

Reference IDs

Tender ID
477774-2026

Documents (1)

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